summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2012-12-07 15:44:18 -0500
committerPádraig Brady <P@draigBrady.com>2012-12-21 15:57:50 +0000
commitb6b24ad49d36e13df54650c99c43f9fddd15ff75 (patch)
tree71fae63d40d066f91d69ac855eccc7b3238fbec4 /src
parentdd44ccef0da458b682bcb6b866aac1460a5b50a1 (diff)
downloadcoreutils-b6b24ad49d36e13df54650c99c43f9fddd15ff75.tar.xz
factor: disable x86_64 assembly code for x32 builds
The current x86_64 asm code does not work for x32 (__ILP32__) ABIs, so disable it. Note simply deleting the q suffix is not enough. * src/longlong.h: Restrict x86_64 assembly to _LP64 targets, which is consistent with other checks in longlong.h and avoids this code on x32. * NEWS: Mention the build fix.
Diffstat (limited to 'src')
-rw-r--r--src/longlong.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/longlong.h b/src/longlong.h
index f2b2c4985..179204533 100644
--- a/src/longlong.h
+++ b/src/longlong.h
@@ -683,7 +683,7 @@ extern UWtype __MPN(udiv_qrnnd) (UWtype *, UWtype, UWtype, UWtype);
&& defined (_PA_RISC2_0) && defined (_LP64)
/* Note the _PA_RISC2_0 above is to exclude this code from GCC with
default -march options which doesn't support these instructions.
- Also the width check for 'long' is to avoid ilp32 runtimes where
+ Also the width check for 'long' is to avoid ILP32 runtimes where
GNU/Linux and narrow HP-UX kernels are known to have issues with
clobbering of context between the add and add,dc instructions. */
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
@@ -1006,7 +1006,9 @@ extern UWtype __MPN(udiv_qrnnd) (UWtype *, UWtype, UWtype, UWtype);
#endif
#endif /* 80x86 */
-#if defined (__amd64__) && W_TYPE_SIZE == 64
+#if defined (__amd64__) && W_TYPE_SIZE == 64 && defined (_LP64)
+/* Note the width check for 'long' is to avoid ILP32 runtimes (x32)
+ where the ABI is known to be incompatible with the following. */
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addq %5,%q1\n\tadcq %3,%q0" \
: "=r" (sh), "=&r" (sl) \