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authorJim Meyering <jim@meyering.net>2000-12-22 22:44:30 +0000
committerJim Meyering <jim@meyering.net>2000-12-22 22:44:30 +0000
commit1a18604b2e3b351d259753448311cae92b5adc8d (patch)
treee9a4237de4208a5e59f4550565a4c9e5aa8c35e1 /src
parenteae1c2b69cbf9090c8c4ad152782e68d4c8a1352 (diff)
downloadcoreutils-1a18604b2e3b351d259753448311cae92b5adc8d.tar.xz
(isaac_seed_machdep) [_ARCH_PPC]: Disable the code
that would use the PPC mfspr `asm' code.
Diffstat (limited to 'src')
-rw-r--r--src/shred.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/shred.c b/src/shred.c
index 9c1262fb8..7d7374550 100644
--- a/src/shred.c
+++ b/src/shred.c
@@ -779,7 +779,7 @@ isaac_seed_finish (struct isaac_state *s)
#define ISAAC_SEED(s,x) isaac_seed_data (s, &(x), sizeof (x))
-#if __GNUC__ >= 2 && (__i386__ || __alpha__ || _ARCH_PPC)
+#if __GNUC__ >= 2 && (__i386__ || __alpha__)
/*
* Many processors have very-high-resolution timer registers,
* The timer registers can be made inaccessible, so we have to deal with the
@@ -815,6 +815,8 @@ isaac_seed_machdep (struct isaac_state *s)
__asm__ __volatile__ ("rpcc %0" : "=r" (t));
# endif
# if _ARCH_PPC
+ /* Code not used because this instruction is available only on first-
+ generation PPCs and evokes a SIGBUS on some Linux 2.4 kernels. */
word32 t;
__asm__ __volatile__ ("mfspr %0,22" : "=r" (t));
# endif
@@ -833,12 +835,12 @@ isaac_seed_machdep (struct isaac_state *s)
}
}
-#else /* !(__i386__ || __alpha__ || _ARCH_PPC) */
+#else /* !(__i386__ || __alpha__) */
/* Do-nothing stub */
# define isaac_seed_machdep(s) (void) 0
-#endif /* !(__i386__ || __alpha__ || _ARCH_PPC) */
+#endif /* !(__i386__ || __alpha__) */
/*